add 7/10 bytes ID
This commit is contained in:
danjperron
@@ -1,46 +1,41 @@
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import mfrc522
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import mfrc522
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from os import uname
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from os import uname
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def do_read():
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def uidToString(uid):
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mystring = ""
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if uname()[0] == 'WiPy':
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for i in uid:
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rdr = mfrc522.MFRC522("GP14", "GP16", "GP15", "GP22", "GP17")
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mystring = "%02X" % i + mystring
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elif uname()[0] == 'esp8266':
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return mystring
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rdr = mfrc522.MFRC522(0, 2, 4, 5, 14)
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else:
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def do_read():
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raise RuntimeError("Unsupported platform")
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if uname()[0] == 'WiPy':
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print("")
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rdr = mfrc522.MFRC522("GP14", "GP16", "GP15", "GP22", "GP17")
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print("Place card before reader to read from address 0x08")
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elif uname()[0] == 'esp32':
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print("")
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rdr = mfrc522.MFRC522(sck=18,mosi=23,miso=19,rst=22,cs=21)
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else:
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try:
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raise RuntimeError("Unsupported platform")
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while True:
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print("")
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(stat, tag_type) = rdr.request(rdr.REQIDL)
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print("Place card before reader to read from address 0x08")
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print("")
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if stat == rdr.OK:
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try:
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(stat, raw_uid) = rdr.anticoll()
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while True:
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if stat == rdr.OK:
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(stat, tag_type) = rdr.request(rdr.REQIDL)
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print("New card detected")
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print(" - tag type: 0x%02x" % tag_type)
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if stat == rdr.OK:
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print(" - uid : 0x%02x%02x%02x%02x" % (raw_uid[0], raw_uid[1], raw_uid[2], raw_uid[3]))
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print("")
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(stat, uid) = rdr.SelectTagSN()
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if rdr.select_tag(raw_uid) == rdr.OK:
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if stat == rdr.OK:
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print("Card detected %s" % uidToString(uid))
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key = [0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF]
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else:
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print("Authentication error")
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if rdr.auth(rdr.AUTHENT1A, 8, key, raw_uid) == rdr.OK:
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print("Address 8 data: %s" % rdr.read(8))
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except KeyboardInterrupt:
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rdr.stop_crypto1()
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print("Bye")
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else:
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print("Authentication error")
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else:
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print("Failed to select tag")
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except KeyboardInterrupt:
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print("Bye")
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@@ -1,50 +0,0 @@
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import mfrc522
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from os import uname
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def do_write():
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if uname()[0] == 'WiPy':
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rdr = mfrc522.MFRC522("GP14", "GP16", "GP15", "GP22", "GP17")
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elif uname()[0] == 'esp8266':
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rdr = mfrc522.MFRC522(0, 2, 4, 5, 14)
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else:
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raise RuntimeError("Unsupported platform")
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print("")
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print("Place card before reader to write address 0x08")
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print("")
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try:
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while True:
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(stat, tag_type) = rdr.request(rdr.REQIDL)
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if stat == rdr.OK:
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(stat, raw_uid) = rdr.anticoll()
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if stat == rdr.OK:
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print("New card detected")
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print(" - tag type: 0x%02x" % tag_type)
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print(" - uid : 0x%02x%02x%02x%02x" % (raw_uid[0], raw_uid[1], raw_uid[2], raw_uid[3]))
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print("")
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if rdr.select_tag(raw_uid) == rdr.OK:
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key = [0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF]
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if rdr.auth(rdr.AUTHENT1A, 8, key, raw_uid) == rdr.OK:
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stat = rdr.write(8, b"\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f")
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rdr.stop_crypto1()
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if stat == rdr.OK:
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print("Data written to card")
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else:
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print("Failed to write data to card")
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else:
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print("Authentication error")
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else:
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print("Failed to select tag")
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except KeyboardInterrupt:
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print("Bye")
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522
mfrc522.py
522
mfrc522.py
@@ -1,229 +1,293 @@
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from machine import Pin, SPI
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from machine import Pin, SPI
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from os import uname
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from os import uname
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class MFRC522:
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class MFRC522:
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OK = 0
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DEBUG = False
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NOTAGERR = 1
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OK = 0
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ERR = 2
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NOTAGERR = 1
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ERR = 2
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REQIDL = 0x26
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REQALL = 0x52
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REQIDL = 0x26
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AUTHENT1A = 0x60
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REQALL = 0x52
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AUTHENT1B = 0x61
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AUTHENT1A = 0x60
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AUTHENT1B = 0x61
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def __init__(self, sck, mosi, miso, rst, cs):
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PICC_ANTICOLL1 = 0x93
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self.sck = Pin(sck, Pin.OUT)
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PICC_ANTICOLL2 = 0x95
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self.mosi = Pin(mosi, Pin.OUT)
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PICC_ANTICOLL3 = 0x97
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self.miso = Pin(miso)
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self.rst = Pin(rst, Pin.OUT)
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self.cs = Pin(cs, Pin.OUT)
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def __init__(self, sck, mosi, miso, rst, cs):
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self.rst.value(0)
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self.sck = Pin(sck, Pin.OUT)
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self.cs.value(1)
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self.mosi = Pin(mosi, Pin.OUT)
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self.miso = Pin(miso)
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board = uname()[0]
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self.rst = Pin(rst, Pin.OUT)
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self.cs = Pin(cs, Pin.OUT)
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if board == 'WiPy' or board == 'LoPy' or board == 'FiPy':
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self.spi = SPI(0)
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self.rst.value(0)
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self.spi.init(SPI.MASTER, baudrate=1000000, pins=(self.sck, self.mosi, self.miso))
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self.cs.value(1)
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elif board == 'esp8266':
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self.spi = SPI(baudrate=100000, polarity=0, phase=0, sck=self.sck, mosi=self.mosi, miso=self.miso)
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board = uname()[0]
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self.spi.init()
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else:
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if board == 'WiPy' or board == 'LoPy' or board == 'FiPy':
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raise RuntimeError("Unsupported platform")
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self.spi = SPI(0)
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self.spi.init(SPI.MASTER, baudrate=1000000, pins=(self.sck, self.mosi, self.miso))
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self.rst.value(1)
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elif (board == 'esp8266') or (board == 'esp32'):
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self.init()
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self.spi = SPI(baudrate=100000, polarity=0, phase=0, sck=self.sck, mosi=self.mosi, miso=self.miso)
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self.spi.init()
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def _wreg(self, reg, val):
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else:
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raise RuntimeError("Unsupported platform")
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self.cs.value(0)
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self.spi.write(b'%c' % int(0xff & ((reg << 1) & 0x7e)))
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self.rst.value(1)
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self.spi.write(b'%c' % int(0xff & val))
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self.init()
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self.cs.value(1)
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def _wreg(self, reg, val):
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def _rreg(self, reg):
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self.cs.value(0)
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self.cs.value(0)
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self.spi.write(b'%c' % int(0xff & ((reg << 1) & 0x7e)))
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self.spi.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80)))
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self.spi.write(b'%c' % int(0xff & val))
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val = self.spi.read(1)
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self.cs.value(1)
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self.cs.value(1)
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def _rreg(self, reg):
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return val[0]
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self.cs.value(0)
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def _sflags(self, reg, mask):
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self.spi.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80)))
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self._wreg(reg, self._rreg(reg) | mask)
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val = self.spi.read(1)
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self.cs.value(1)
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def _cflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) & (~mask))
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return val[0]
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def _tocard(self, cmd, send):
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def _sflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) | mask)
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recv = []
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bits = irq_en = wait_irq = n = 0
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def _cflags(self, reg, mask):
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stat = self.ERR
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self._wreg(reg, self._rreg(reg) & (~mask))
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if cmd == 0x0E:
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def _tocard(self, cmd, send):
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irq_en = 0x12
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wait_irq = 0x10
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recv = []
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elif cmd == 0x0C:
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bits = irq_en = wait_irq = n = 0
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irq_en = 0x77
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stat = self.ERR
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wait_irq = 0x30
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if cmd == 0x0E:
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self._wreg(0x02, irq_en | 0x80)
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irq_en = 0x12
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self._cflags(0x04, 0x80)
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wait_irq = 0x10
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self._sflags(0x0A, 0x80)
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elif cmd == 0x0C:
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self._wreg(0x01, 0x00)
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irq_en = 0x77
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wait_irq = 0x30
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for c in send:
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self._wreg(0x09, c)
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self._wreg(0x02, irq_en | 0x80)
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self._wreg(0x01, cmd)
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self._cflags(0x04, 0x80)
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self._sflags(0x0A, 0x80)
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if cmd == 0x0C:
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self._wreg(0x01, 0x00)
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self._sflags(0x0D, 0x80)
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for c in send:
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i = 2000
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self._wreg(0x09, c)
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while True:
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self._wreg(0x01, cmd)
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n = self._rreg(0x04)
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i -= 1
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if cmd == 0x0C:
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if ~((i != 0) and ~(n & 0x01) and ~(n & wait_irq)):
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self._sflags(0x0D, 0x80)
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break
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i = 2000
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self._cflags(0x0D, 0x80)
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while True:
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n = self._rreg(0x04)
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if i:
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i -= 1
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if (self._rreg(0x06) & 0x1B) == 0x00:
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if ~((i != 0) and ~(n & 0x01) and ~(n & wait_irq)):
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stat = self.OK
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break
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if n & irq_en & 0x01:
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self._cflags(0x0D, 0x80)
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stat = self.NOTAGERR
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elif cmd == 0x0C:
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if i:
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n = self._rreg(0x0A)
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if (self._rreg(0x06) & 0x1B) == 0x00:
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lbits = self._rreg(0x0C) & 0x07
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stat = self.OK
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if lbits != 0:
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bits = (n - 1) * 8 + lbits
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if n & irq_en & 0x01:
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else:
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stat = self.NOTAGERR
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bits = n * 8
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elif cmd == 0x0C:
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n = self._rreg(0x0A)
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if n == 0:
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lbits = self._rreg(0x0C) & 0x07
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n = 1
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if lbits != 0:
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elif n > 16:
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bits = (n - 1) * 8 + lbits
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n = 16
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else:
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bits = n * 8
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for _ in range(n):
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recv.append(self._rreg(0x09))
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if n == 0:
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else:
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n = 1
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stat = self.ERR
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elif n > 16:
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n = 16
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return stat, recv, bits
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for _ in range(n):
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def _crc(self, data):
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recv.append(self._rreg(0x09))
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else:
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self._cflags(0x05, 0x04)
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stat = self.ERR
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self._sflags(0x0A, 0x80)
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return stat, recv, bits
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for c in data:
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self._wreg(0x09, c)
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def _crc(self, data):
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self._wreg(0x01, 0x03)
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self._cflags(0x05, 0x04)
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self._sflags(0x0A, 0x80)
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i = 0xFF
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while True:
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for c in data:
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n = self._rreg(0x05)
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self._wreg(0x09, c)
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i -= 1
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if not ((i != 0) and not (n & 0x04)):
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self._wreg(0x01, 0x03)
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break
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i = 0xFF
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return [self._rreg(0x22), self._rreg(0x21)]
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while True:
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n = self._rreg(0x05)
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def init(self):
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i -= 1
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if not ((i != 0) and not (n & 0x04)):
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self.reset()
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break
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self._wreg(0x2A, 0x8D)
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self._wreg(0x2B, 0x3E)
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return [self._rreg(0x22), self._rreg(0x21)]
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self._wreg(0x2D, 30)
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self._wreg(0x2C, 0)
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def init(self):
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self._wreg(0x15, 0x40)
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self._wreg(0x11, 0x3D)
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self.reset()
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self.antenna_on()
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self._wreg(0x2A, 0x8D)
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self._wreg(0x2B, 0x3E)
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def reset(self):
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self._wreg(0x2D, 30)
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self._wreg(0x01, 0x0F)
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self._wreg(0x2C, 0)
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self._wreg(0x15, 0x40)
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def antenna_on(self, on=True):
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self._wreg(0x11, 0x3D)
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self.antenna_on()
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if on and ~(self._rreg(0x14) & 0x03):
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self._sflags(0x14, 0x03)
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def reset(self):
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else:
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self._wreg(0x01, 0x0F)
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self._cflags(0x14, 0x03)
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def antenna_on(self, on=True):
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def request(self, mode):
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if on and ~(self._rreg(0x14) & 0x03):
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self._wreg(0x0D, 0x07)
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self._sflags(0x14, 0x03)
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(stat, recv, bits) = self._tocard(0x0C, [mode])
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else:
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self._cflags(0x14, 0x03)
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if (stat != self.OK) | (bits != 0x10):
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stat = self.ERR
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def request(self, mode):
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return stat, bits
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self._wreg(0x0D, 0x07)
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(stat, recv, bits) = self._tocard(0x0C, [mode])
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def anticoll(self):
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if (stat != self.OK) | (bits != 0x10):
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ser_chk = 0
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stat = self.ERR
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ser = [0x93, 0x20]
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return stat, bits
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self._wreg(0x0D, 0x00)
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(stat, recv, bits) = self._tocard(0x0C, ser)
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def anticoll(self,anticolN):
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if stat == self.OK:
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ser_chk = 0
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if len(recv) == 5:
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ser = [anticolN, 0x20]
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for i in range(4):
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ser_chk = ser_chk ^ recv[i]
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self._wreg(0x0D, 0x00)
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if ser_chk != recv[4]:
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(stat, recv, bits) = self._tocard(0x0C, ser)
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stat = self.ERR
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else:
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if stat == self.OK:
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stat = self.ERR
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if len(recv) == 5:
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for i in range(4):
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return stat, recv
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ser_chk = ser_chk ^ recv[i]
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if ser_chk != recv[4]:
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def select_tag(self, ser):
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stat = self.ERR
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else:
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buf = [0x93, 0x70] + ser[:5]
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stat = self.ERR
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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return stat, recv
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return self.OK if (stat == self.OK) and (bits == 0x18) else self.ERR
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def auth(self, mode, addr, sect, ser):
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def PcdSelect(self, serNum,anticolN):
|
||||||
return self._tocard(0x0E, [mode, addr] + sect + ser[:4])[0]
|
backData = []
|
||||||
|
buf = []
|
||||||
def stop_crypto1(self):
|
buf.append(anticolN)
|
||||||
self._cflags(0x08, 0x08)
|
buf.append(0x70)
|
||||||
|
i = 0
|
||||||
def read(self, addr):
|
while i<5:
|
||||||
|
buf.append(serNum[i])
|
||||||
data = [0x30, addr]
|
i = i + 1
|
||||||
data += self._crc(data)
|
pOut = self._crc(buf)
|
||||||
(stat, recv, _) = self._tocard(0x0C, data)
|
buf.append(pOut[0])
|
||||||
return recv if stat == self.OK else None
|
buf.append(pOut[1])
|
||||||
|
(status, backData, backLen) = self._tocard( 0x0C, buf)
|
||||||
def write(self, addr, data):
|
if (status == self.OK) and (backLen == 0x18):
|
||||||
|
return 1
|
||||||
buf = [0xA0, addr]
|
else:
|
||||||
buf += self._crc(buf)
|
return 0
|
||||||
(stat, recv, bits) = self._tocard(0x0C, buf)
|
|
||||||
|
|
||||||
if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
|
def SelectTagSN(self):
|
||||||
stat = self.ERR
|
valid_uid=[]
|
||||||
else:
|
(status,uid)= self.anticoll(self.PICC_ANTICOLL1)
|
||||||
buf = []
|
if status != self.OK:
|
||||||
for i in range(16):
|
return (self.ERR,[])
|
||||||
buf.append(data[i])
|
|
||||||
buf += self._crc(buf)
|
if self.DEBUG: print("anticol(1) {}".format(uid))
|
||||||
(stat, recv, bits) = self._tocard(0x0C, buf)
|
if self.PcdSelect(uid,self.PICC_ANTICOLL1) == 0:
|
||||||
if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
|
return (self.MI_ERR,[])
|
||||||
stat = self.ERR
|
if self.DEBUG: print("pcdSelect(1) {}".format(uid))
|
||||||
|
|
||||||
return stat
|
#check if first byte is 0x88
|
||||||
|
if uid[0] == 0x88 :
|
||||||
|
#ok we have another type of card
|
||||||
|
valid_uid.extend(uid[1:4])
|
||||||
|
(status,uid)=self.anticoll(self.PICC_ANTICOLL2)
|
||||||
|
if status != self.OK:
|
||||||
|
return (self.ERR,[])
|
||||||
|
if self.DEBUG: print("Anticol(2) {}".format(uid))
|
||||||
|
rtn = self.PcdSelect(uid,self.PICC_ANTICOLL2)
|
||||||
|
if self.DEBUG: print("pcdSelect(2) return={} uid={}".format(rtn,uid))
|
||||||
|
if rtn == 0:
|
||||||
|
return (self.ERR,[])
|
||||||
|
if self.DEBUG: print("PcdSelect2() {}".format(uid))
|
||||||
|
#now check again if uid[0] is 0x88
|
||||||
|
if uid[0] == 0x88 :
|
||||||
|
valid_uid.extend(uid[1:4])
|
||||||
|
(status , uid) = self.anticoll(self.PICC_ANTICOLL3)
|
||||||
|
if status != self.OK:
|
||||||
|
return (self.ERR,[])
|
||||||
|
if self.DEBUG: print("Anticol(3) {}".format(uid))
|
||||||
|
if self.MFRC522_PcdSelect(uid,self.PICC_ANTICOLL3) == 0:
|
||||||
|
return (self.ERR,[])
|
||||||
|
if self.DEBUG: print("PcdSelect(3) {}".format(uid))
|
||||||
|
valid_uid.extend(uid[0:4])
|
||||||
|
return (self.OK , valid_uid)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
def auth(self, mode, addr, sect, ser):
|
||||||
|
return self._tocard(0x0E, [mode, addr] + sect + ser[:4])[0]
|
||||||
|
|
||||||
|
def stop_crypto1(self):
|
||||||
|
self._cflags(0x08, 0x08)
|
||||||
|
|
||||||
|
def read(self, addr):
|
||||||
|
|
||||||
|
data = [0x30, addr]
|
||||||
|
data += self._crc(data)
|
||||||
|
(stat, recv, _) = self._tocard(0x0C, data)
|
||||||
|
return recv if stat == self.OK else None
|
||||||
|
|
||||||
|
def write(self, addr, data):
|
||||||
|
|
||||||
|
buf = [0xA0, addr]
|
||||||
|
buf += self._crc(buf)
|
||||||
|
(stat, recv, bits) = self._tocard(0x0C, buf)
|
||||||
|
|
||||||
|
if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
|
||||||
|
stat = self.ERR
|
||||||
|
else:
|
||||||
|
buf = []
|
||||||
|
for i in range(16):
|
||||||
|
buf.append(data[i])
|
||||||
|
buf += self._crc(buf)
|
||||||
|
(stat, recv, bits) = self._tocard(0x0C, buf)
|
||||||
|
if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
|
||||||
|
stat = self.ERR
|
||||||
|
|
||||||
|
return stat
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user