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powerpc: Add initial port to bare metal PowerPC arch.

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Runs in microwatt (GHDL and FPGA) and qemu.

Port done initially by Michael Neuling, with help from Anton Blanchard and
Jordan Niethe.
This commit is contained in:
Michael Neuling
2019-08-22 10:21:48 +10:00
committed by Damien George
parent 19ca025b45
commit 079cc940a6
20 changed files with 1087 additions and 0 deletions
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4
py/nlr.h
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@@ -73,6 +73,10 @@
#elif defined(__xtensa__)
#define MICROPY_NLR_XTENSA (1)
#define MICROPY_NLR_NUM_REGS (MICROPY_NLR_NUM_REGS_XTENSA)
#elif defined(__powerpc__)
#define MICROPY_NLR_POWERPC (1)
// this could be less but using 128 for safety
#define MICROPY_NLR_NUM_REGS (128)
#else
#define MICROPY_NLR_SETJMP (1)
//#warning "No native NLR support for this arch, using setjmp implementation"