rp2/pendsv: Account for PendSV running on both cores, and without CYW43.

Changes:
- Move setting of PendSV priority to pendsv_init().
- Call pendsv_init() from CPU1 as well, to ensure priority is the same.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
This commit is contained in:
Angus Gratton
2025-03-12 16:57:19 +11:00
committed by Damien George
parent 23fb171b80
commit 35d4d2d06b
4 changed files with 26 additions and 14 deletions

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@@ -42,7 +42,6 @@ static soft_timer_entry_t mp_network_soft_timer;
#if MICROPY_PY_NETWORK_CYW43 #if MICROPY_PY_NETWORK_CYW43
#include "lib/cyw43-driver/src/cyw43.h" #include "lib/cyw43-driver/src/cyw43.h"
#include "lib/cyw43-driver/src/cyw43_stats.h" #include "lib/cyw43-driver/src/cyw43_stats.h"
#include "hardware/irq.h"
#if !defined(__riscv) #if !defined(__riscv)
#if PICO_RP2040 #if PICO_RP2040
@@ -97,9 +96,6 @@ static void gpio_irq_handler(void) {
void cyw43_irq_init(void) { void cyw43_irq_init(void) {
gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_SHARED_IRQ_HANDLER_PRIORITY); gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_SHARED_IRQ_HANDLER_PRIORITY);
irq_set_enabled(IO_IRQ_BANK0, true); irq_set_enabled(IO_IRQ_BANK0, true);
#if !defined(__riscv)
NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
#endif
} }
// This hook will run on whichever CPU serviced the PendSV interrupt // This hook will run on whichever CPU serviced the PendSV interrupt

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@@ -106,6 +106,9 @@ static void core1_entry_wrapper(void) {
// Allow MICROPY_BEGIN_ATOMIC_SECTION to be invoked from core0. // Allow MICROPY_BEGIN_ATOMIC_SECTION to be invoked from core0.
multicore_lockout_victim_init(); multicore_lockout_victim_init();
// Set PendSV interrupt priority correctly for CPU1
pendsv_init();
if (core1_entry) { if (core1_entry) {
core1_entry(core1_arg); core1_entry(core1_arg);
} }

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@@ -28,6 +28,7 @@
#include "py/mpconfig.h" #include "py/mpconfig.h"
#include "py/mpthread.h" #include "py/mpthread.h"
#include "pendsv.h" #include "pendsv.h"
#include "hardware/irq.h"
#if PICO_RP2040 #if PICO_RP2040
#include "RP2040.h" #include "RP2040.h"
@@ -45,6 +46,9 @@ static pendsv_dispatch_t pendsv_dispatch_table[PENDSV_DISPATCH_NUM_SLOTS];
static inline void pendsv_resume_run_dispatch(void); static inline void pendsv_resume_run_dispatch(void);
// PendSV IRQ priority, to run system-level tasks that preempt the main thread.
#define IRQ_PRI_PENDSV PICO_LOWEST_IRQ_PRIORITY
void PendSV_Handler(void); void PendSV_Handler(void);
#if MICROPY_PY_THREAD #if MICROPY_PY_THREAD
@@ -53,8 +57,14 @@ void PendSV_Handler(void);
// loop of mp_wfe_or_timeout(), where we don't want the CPU event bit to be set. // loop of mp_wfe_or_timeout(), where we don't want the CPU event bit to be set.
static mp_thread_recursive_mutex_t pendsv_mutex; static mp_thread_recursive_mutex_t pendsv_mutex;
// Called from CPU0 during boot, but may be called later when CPU1 wakes up
void pendsv_init(void) { void pendsv_init(void) {
mp_thread_recursive_mutex_init(&pendsv_mutex); if (get_core_num() == 0) {
mp_thread_recursive_mutex_init(&pendsv_mutex);
}
#if !defined(__riscv)
NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
#endif
} }
void pendsv_suspend(void) { void pendsv_suspend(void) {
@@ -117,11 +127,13 @@ static inline void pendsv_resume_run_dispatch(void) {
void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) { void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) {
pendsv_dispatch_table[slot] = f; pendsv_dispatch_table[slot] = f;
// There is a race here where other core calls pendsv_suspend() before ISR
// can execute so this check fails, but dispatch will happen later when
// other core calls pendsv_resume().
if (pendsv_suspend_count() == 0) { if (pendsv_suspend_count() == 0) {
#if PICO_ARM #if PICO_ARM
// There is a race here where other core calls pendsv_suspend() before // Note this register is part of each CPU core, so setting it on CPUx
// ISR can execute, but dispatch will happen later when other core // will set the IRQ and run PendSV_Handler on CPUx only.
// calls pendsv_resume().
SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
#elif PICO_RISCV #elif PICO_RISCV
struct timespec ts; struct timespec ts;
@@ -136,15 +148,19 @@ void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) {
} }
// PendSV interrupt handler to perform background processing. // PendSV interrupt handler to perform background processing.
//
// Handler can execute on either CPU if MICROPY_PY_THREAD is set (no code on
// CPU1 calls pendsv_schedule_dispatch(), but CPU1 can call pendsv_resume()
// which will trigger it).
void PendSV_Handler(void) { void PendSV_Handler(void) {
#if MICROPY_PY_THREAD #if MICROPY_PY_THREAD
if (!mp_thread_recursive_mutex_lock(&pendsv_mutex, 0)) { if (!mp_thread_recursive_mutex_lock(&pendsv_mutex, 0)) {
// Failure here means core 1 holds pendsv_mutex. ISR will // Failure here means other core holds pendsv_mutex. ISR will
// run again after core 1 calls pendsv_resume(). // run again after that core calls pendsv_resume().
return; return;
} }
// Core 0 should not already have locked pendsv_mutex // This core should not already have locked pendsv_mutex
assert(pendsv_mutex.mutex.enter_count == 1); assert(pendsv_mutex.mutex.enter_count == 1);
#else #else
assert(pendsv_suspend_count() == 0); assert(pendsv_suspend_count() == 0);

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@@ -42,9 +42,6 @@ enum {
#define PENDSV_DISPATCH_NUM_SLOTS PENDSV_DISPATCH_MAX #define PENDSV_DISPATCH_NUM_SLOTS PENDSV_DISPATCH_MAX
// PendSV IRQ priority, to run system-level tasks that preempt the main thread.
#define IRQ_PRI_PENDSV PICO_LOWEST_IRQ_PRIORITY
typedef void (*pendsv_dispatch_t)(void); typedef void (*pendsv_dispatch_t)(void);
void pendsv_init(void); void pendsv_init(void);