all: Fix spelling mistakes based on codespell check.
Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
@@ -165,7 +165,7 @@ pwm_start(void) {
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}
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}
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PWM_DBG("2channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n", *local_channel, local_single[0].h_time, local_single[1].h_time, local_single[2].h_time, local_single[3].h_time);
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// step 4: cacl delt time
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// step 4: calc delta time
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for (i = *local_channel - 1; i > 0; i--) {
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local_single[i].h_time -= local_single[i - 1].h_time;
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}
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@@ -79,7 +79,7 @@
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#define SPI_MOSI_DELAY_NUM 0x00000007
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#define SPI_MOSI_DELAY_NUM_S 23
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#define SPI_MOSI_DELAY_MODE 0x00000003 //mode 0 : posedge; data set at positive edge of clk
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//mode 1 : negedge + 1 cycle delay, only if freq<10MHz ; data set at negitive edge of clk
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//mode 1 : negedge + 1 cycle delay, only if freq<10MHz ; data set at negative edge of clk
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//mode 2 : Do not use this mode.
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#define SPI_MOSI_DELAY_MODE_S 21
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#define SPI_MISO_DELAY_NUM 0x00000007
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@@ -3,7 +3,7 @@
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*
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* FileName: uart.c
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*
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* Description: Two UART mode configration and interrupt handler.
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* Description: Two UART mode configuration and interrupt handler.
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* Check your hardware connection while use this mode.
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*
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* Modification history:
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@@ -164,7 +164,7 @@ uart_os_config(int uart) {
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*******************************************************************************/
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static void uart0_rx_intr_handler(void *para) {
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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/* uart0 and uart1 intr combine together, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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* uart1 and uart0 respectively
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*/
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