docs: Spelling mistakes
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committed by
Paul Sokolovsky
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ce166e6b68
@@ -95,7 +95,7 @@ We set up timer 2 as follows::
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The prescaler is set at 83, which makes this timer count at 1 MHz.
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This is because the CPU clock, running at 168 MHz, is divided by
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2 and then by prescaler+1, giving a freqency of 168 MHz/2/(83+1)=1 MHz
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2 and then by prescaler+1, giving a frequency of 168 MHz/2/(83+1)=1 MHz
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for timer 2. The period is set to a large number so that the timer
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can count up to a large number before wrapping back around to zero.
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In this case it will take about 17 minutes before it cycles back to
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