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esp32/esp32_common.cmake: Clean up RISC-V directives.

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This commit cleans up a couple of RISC-V specific directives in the
build script.  Namely, removes the forced inclusion of the "riscv"
component and introduces proper mpy-cross flags.

The "riscv" component is already included by the ESP-IDF build
framework, as certain low-level components would not build otherwise, so
there is no need to add it to the required components list.

The architecture flag for mpy-cross is now set for RISC-V targets, as it
was previously set only for Xtensa targets (and it relied on a string
comparison rather than using the appropriate configuration variable).

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit is contained in:
Alessandro Gatti
2025-03-22 02:40:59 +01:00
committed by Damien George
parent 9ab6906f50
commit fda9bf4917
1 changed files with 4 additions and 3 deletions
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7
ports/esp32/esp32_common.cmake
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@@ -20,7 +20,6 @@ if(CONFIG_IDF_TARGET_ARCH_RISCV)
${MICROPY_DIR}/shared/runtime/gchelper_native.c ${MICROPY_DIR}/shared/runtime/gchelper_native.c
${MICROPY_DIR}/shared/runtime/gchelper_rv32i.s ${MICROPY_DIR}/shared/runtime/gchelper_rv32i.s
) )
list(APPEND IDF_COMPONENTS riscv)
endif() endif()
if(NOT DEFINED MICROPY_PY_TINYUSB) if(NOT DEFINED MICROPY_PY_TINYUSB)
@@ -237,8 +236,10 @@ idf_component_register(
set(MICROPY_TARGET ${COMPONENT_TARGET}) set(MICROPY_TARGET ${COMPONENT_TARGET})
# Define mpy-cross flags, for use with frozen code. # Define mpy-cross flags, for use with frozen code.
if(CONFIG_IDF_TARGET_ARCH STREQUAL "xtensa") if(CONFIG_IDF_TARGET_ARCH_XTENSA)
set(MICROPY_CROSS_FLAGS -march=xtensawin) set(MICROPY_CROSS_FLAGS -march=xtensawin)
elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
set(MICROPY_CROSS_FLAGS -march=rv32imc)
endif() endif()
# Set compile options for this port. # Set compile options for this port.