Matthias Blankertz
502805e2e8
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The code snippet in hwconfig to adjust the drive strength was incorrect: It was adjusting the wrong pins. This was probably not updated during some pin shuffling in the breadboard phase. Fix this by adjusting the correct pins. Experimentation shows that both setting the slew rate to fast or setting the drive strength to 8 mA (default: slow and 4 mA) is sufficient to make SD SPI work at 25 MHz on the Rev1 PCB. For now, the combination 8 mA and slow is chosen (slow slew rate should result in less high frequency EMI). Also make the SD clock rate adjustable in hwconfig, and set it to 25 MHz for Rev1 and 15 MHz for the breadboard setup. Signed-off-by: Matthias Blankertz <matthias@blankertz.org>