toplevel label ddr2_clock ddr2_clock ddr2_reset ddr2_reset ddr2_dq[15:0] ddr2_dq[15:0] HEXRADIX ddr2_a[12:0] ddr2_a[12:0] ddr2_ba[1:0] ddr2_ba[1:0] ddr2_cke ddr2_cke ddr2_cs_n ddr2_cs_n ddr2_ras_n ddr2_ras_n ddr2_cas_n ddr2_cas_n ddr2_we_n ddr2_we_n ddr2_odt ddr2_odt ddr2_dm[1:0] ddr2_dm[1:0] rst_dqs_div_in rst_dqs_div_in rst_dqs_div_out rst_dqs_div_out ddr2_dqs[1:0] ddr2_dqs[1:0] ddr2_dqs_n[1:0] ddr2_dqs_n[1:0] ddr2_ck[0:0] ddr2_ck[0:0] ddr2_ck_n[0:0] ddr2_ck_n[0:0] clk_i clk_i rst_i rst_i dat_i[31:0] dat_i[31:0] dat_o[31:0] dat_o[31:0] ack_o ack_o adr_i[25:2] adr_i[25:2] cyc_i cyc_i sel_i[3:0] sel_i[3:0] stb_i stb_i we_i we_i cti_i[2:0] cti_i[2:0] bte_i[1:0] bte_i[1:0] ddr_cd_inst label ddr2_clk0 ddr2_clk0 ddr2_clk180 ddr2_clk180 ddr2_clk90 ddr2_clk90 ddr2_reset ddr2_reset ctrl_input_data[31:0] ctrl_input_data[31:0] HEXRADIX ctrl_data_mask[3:0] ctrl_data_mask[3:0] ctrl_output_data[31:0] ctrl_output_data[31:0] HEXRADIX ctrl_data_valid ctrl_data_valid ctrl_input_address[24:0] ctrl_input_address[24:0] HEXRADIX ctrl_command_register[2:0] ctrl_command_register[2:0] ctrl_burst_done ctrl_burst_done ctrl_auto_ref_req ctrl_auto_ref_req ctrl_cmd_ack ctrl_cmd_ack ctrl_init_done ctrl_init_done ctrl_ar_done ctrl_ar_done din[63:0] din[63:0] HEXRADIX dout[63:0] dout[63:0] HEXRADIX adr[22:0] adr[22:0] HEXRADIX we we be[7:0] be[7:0] fifo_to_sys_write fifo_to_sys_write fifo_from_sys_read fifo_from_sys_read fifo_to_sys_full fifo_to_sys_full fifo_from_sys_empty fifo_from_sys_empty ddr_address[22:0] ddr_address[22:0] HEXRADIX ddr_address_en ddr_address_en ddr_dout[31:0] ddr_dout[31:0] HEXRADIX ddr_dout_en ddr_dout_en ddr_dout_high ddr_dout_high dout_low[31:0] dout_low[31:0] HEXRADIX dout_low_en dout_low_en ddr_dmask[3:0] ddr_dmask[3:0] ddr_dmask_rst ddr_dmask_rst ddr_dmask_en ddr_dmask_en ctrl_command_register_d[2:0] ctrl_command_register_d[2:0] ctrl_burst_done_d ctrl_burst_done_d ctrl_state ctrl_state burst_start_adr[12:0] burst_start_adr[12:0] fifo_pending fifo_pending fifo_from_sys_read_int fifo_from_sys_read_int fifo_from_sys_valid fifo_from_sys_valid system_cd_inst label clk_i clk_i rst_i rst_i wbs_i wbs_i wbs_o wbs_o ddr_din[63:0] ddr_din[63:0] HEXRADIX ddr_dout[63:0] ddr_dout[63:0] HEXRADIX ddr_adr[22:0] ddr_adr[22:0] HEXRADIX ddr_we ddr_we ddr_be[7:0] ddr_be[7:0] fifo_to_ddr_write fifo_to_ddr_write fifo_from_ddr_read fifo_from_ddr_read fifo_to_ddr_full fifo_to_ddr_full fifo_from_ddr_empty fifo_from_ddr_empty state state fifo_from_ddr_read_int fifo_from_ddr_read_int fifo_from_ddr_valid fifo_from_ddr_valid ddr_dout_high ddr_dout_high burst_unaligned burst_unaligned burst_ctr burst_ctr