- Redesign wishbone interconnect - Changed wb_ddr_ctrl_wb_sc to allow easier addition of ports
7 lines
118 B
Batchfile
7 lines
118 B
Batchfile
setMode -bs
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setCable -port auto
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identify
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assignFile -p 1 -file "2d_display_engine_bd.bit"
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program -p 1 -onlyFpga
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exit
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