Files
2d_display_engine-new/constr/2d_display_engine.ucf
Matthias Blankertz 1807fb99b5 - Replaced cache with simpler wishbone-memory bridge
- Redesign wishbone interconnect
- Changed wb_ddr_ctrl_wb_sc to allow easier addition of ports
2013-06-04 23:18:16 +02:00

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# Timing constraints
NET "CLKIN_50MHZ" TNM_NET = "CLK_50";
TIMESPEC "TS_CLK_50" = PERIOD "CLK_50" 20.0 ns HIGH 50 %;
# NET "CLKIN_133MHZ" PERIOD = 7.51ns HIGH 40%;
TIMEGRP "vga" OFFSET = OUT 10ns AFTER "CLKIN_50MHZ" RISING;
# Location and I/O defs
# Clocks
NET "CLKIN_50MHZ" LOC = "E12"| IOSTANDARD = LVCMOS33 ;
NET "CLKIN_133MHZ" LOC = "V12"| IOSTANDARD = LVCMOS33 ;
# Reset (on BTN_EAST)
NET "RESET" LOC = "T16" | IOSTANDARD = LVCMOS33 | PULLDOWN ;
# VGA output
NET "VGA_R<3>" LOC = "C8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_R<2>" LOC = "B8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_R<1>" LOC = "B3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_R<0>" LOC = "A3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_G<3>" LOC = "D6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_G<2>" LOC = "C6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_G<1>" LOC = "D5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_G<0>" LOC = "C5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_B<3>" LOC = "C9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_B<2>" LOC = "B9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_B<1>" LOC = "D7" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_B<0>" LOC = "C7" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_HSYNC" LOC = "C11" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
NET "VGA_VSYNC" LOC = "B11" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
# SPI flash
NET "DATAFLASH_MISO" LOC = "AB20" | IOSTANDARD = LVCMOS33 ;
NET "DATAFLASH_MOSI" LOC = "AB14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
NET "DATAFLASH_SCK" LOC = "AA20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
NET "DATAFLASH_SS" LOC = "Y4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
# write-protect and reset controls for Atmel AT45DB161D PROM
NET "DATAFLASH_WP" LOC = "C14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
NET "DATAFLASH_RST" LOC = "C15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
# LEDs
NET "LED<0>" LOC = "R20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<1>" LOC = "T19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<2>" LOC = "U20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<3>" LOC = "U19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<4>" LOC = "V19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<5>" LOC = "V20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<6>" LOC = "Y22" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "LED<7>" LOC = "W21" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
# RS232
NET "RS232_RXD" LOC = "E16" | IOSTANDARD = LVCMOS33;
NET "RS232_TXD" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
# MicroSD PMOD (in J18)
NET "SD_MISO" LOC = "AA21" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
NET "SD_SCK" LOC = "AB21" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
NET "SD_CS" LOC = "AA19" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
NET "SD_MOSI" LOC = "AB19" | IOSTANDARD = LVCMOS33 | DRIVE = 8;