104 lines
2.0 KiB
C++
104 lines
2.0 KiB
C++
#ifndef _CORTEXA8_HH_
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#define _CORTEXA8_HH_
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#include <cstdint>
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#include <cassert>
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#include <sys/reent.h>
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#define CORTEXA8_CPUID_MAINID 0
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#define CORTEXA8_CPUID_CACHETYPE 1
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#define CORTEXA8_CPUID_TLBTYPE 2
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#define CORTEXA8_CPUID_PFR0 3
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#define CORTEXA8_CPUID_PFR1 4
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// Implemented in cortexa8_asm.s
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extern "C" {
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void cortexa8_ena_int();
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void cortexa8_dis_int();
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bool cortexa8_get_int();
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void cortexa8_set_usr_sp(void *sp);
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void cortexa8_set_abt_sp(void *sp);
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void cortexa8_set_und_sp(void *sp);
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void cortexa8_set_irq_sp(void *sp);
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void cortexa8_set_fiq_sp(void *sp);
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uint32_t cortexa8_get_spsr();
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uint32_t cortexa8_get_cpsr();
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}
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namespace cortexa8 {
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void init_mode();
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uint32_t read_cpuid(int reg) noexcept;
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void enable_icache() noexcept;
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void enable_dcache() noexcept;
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void disable_icache() noexcept;
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void disable_dcache() noexcept;
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void errata() noexcept;
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void init_mmu() noexcept;
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void init_handlers() noexcept;
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void map_pages(uintptr_t virt, uintptr_t phys, unsigned count);
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void unmap_pages(uintptr_t virt, unsigned count);
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struct thread_cb {
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thread_cb()
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: regs{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, cpsr{0}, newlibReent _REENT_INIT(newlibReent) {
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}
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uint32_t regs[16];
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uint32_t cpsr;
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struct _reent newlibReent;
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};
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thread_cb *get_cur_thread();
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void set_cur_thread(thread_cb* tcb);
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void exit_svc();
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void yield_svc();
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bool in_handler();
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// Wrapper to handle safe disabling/enabling of interrupts
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class ScopedSetIF {
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public:
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ScopedSetIF(bool enableInts = false) : savedIF_{cortexa8_get_int()}, done_{false} {
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if(enableInts)
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cortexa8_ena_int();
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else
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cortexa8_dis_int();
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}
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~ScopedSetIF() {
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if(done_)
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return;
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if(savedIF_)
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cortexa8_ena_int();
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else
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cortexa8_dis_int();
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}
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void restore() {
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assert(!done_);
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if(savedIF_)
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cortexa8_ena_int();
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else
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cortexa8_dis_int();
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done_ = true;
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}
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private:
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bool savedIF_, done_;
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};
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}
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#endif
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