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alif/mpmetalport: Add Open-AMP MPU region.

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Define an MPU region for Open-AMP and remove hard-coded attribute.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader
2024-11-21 07:56:02 +01:00
committed by Damien George
parent 3d17f63478
commit 5152a1f04d
3 changed files with 9 additions and 13 deletions
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18
ports/alif/mpmetalport.c
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@@ -48,28 +48,22 @@ int metal_sys_init(const struct metal_init_params *params) {
hwsem_reset(METAL_HSEM_REMOTE);
#endif
// Enable the hardware semaphore IRQ.
NVIC_ClearPendingIRQ(METAL_HSEM_IRQn);
NVIC_SetPriority(METAL_HSEM_IRQn, IRQ_PRI_HWSEM);
NVIC_EnableIRQ(METAL_HSEM_IRQn);
// If cache management is not enabled, configure the MPU to disable
// caching for the entire Open-AMP shared memory region.
#ifndef VIRTIO_USE_DCACHE
ARM_MPU_Disable();
// NOTE: The startup code uses the first 4 attributes.
#define MEMATTR_IDX_NORMAL_NON_CACHEABLE 4
ARM_MPU_SetMemAttr(MEMATTR_IDX_NORMAL_NON_CACHEABLE, ARM_MPU_ATTR(
ARM_MPU_ATTR_NON_CACHEABLE,
ARM_MPU_ATTR_NON_CACHEABLE));
MPU->RNR = METAL_MPU_REGION_ID;
MPU->RBAR = ARM_MPU_RBAR(METAL_MPU_REGION_BASE, ARM_MPU_SH_NON, 0, 1, 0); // RO-0, NP-1, XN-0
MPU->RLAR = ARM_MPU_RLAR(METAL_MPU_REGION_BASE + METAL_MPU_REGION_SIZE - 1, MEMATTR_IDX_NORMAL_NON_CACHEABLE);
MPU->RBAR = ARM_MPU_RBAR(METAL_MPU_REGION_BASE, ARM_MPU_SH_NON, 0, 1, 1); // RO-0, NP-1, XN-1
MPU->RLAR = ARM_MPU_RLAR(METAL_MPU_REGION_BASE + METAL_MPU_REGION_SIZE - 1, MP_MPU_ATTR_NORMAL_NON_CACHEABLE);
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
#endif
metal_bus_register(&metal_generic_bus);
// Enable the hardware semaphore IRQ.
NVIC_ClearPendingIRQ(METAL_HSEM_IRQn);
NVIC_SetPriority(METAL_HSEM_IRQn, IRQ_PRI_HWSEM);
NVIC_EnableIRQ(METAL_HSEM_IRQn);
return 0;
}

3
ports/alif/mpmetalport.h
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@@ -31,6 +31,7 @@
#include <stdlib.h>
#include "py/mphal.h"
#include "py/runtime.h"
#include "mpu.h"
#define METAL_HAVE_STDATOMIC_H 0
#define METAL_HAVE_FUTEX_H 0
@@ -66,7 +67,7 @@
#define METAL_SHM_ADDR ((metal_phys_addr_t)(_openamp_shm_region_start + METAL_RSC_SIZE))
#define METAL_SHM_SIZE ((size_t)(_openamp_shm_region_end - _openamp_shm_region_start - METAL_RSC_SIZE))
#define METAL_MPU_REGION_ID (9) // NOTE: The startup code uses the first 9 regions.
#define METAL_MPU_REGION_ID (MP_MPU_REGION_OPENAMP)
#define METAL_MPU_REGION_BASE ((uint32_t)_openamp_shm_region_start)
#define METAL_MPU_REGION_SIZE (0x00010000U)

1
ports/alif/mpu.h
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@@ -36,3 +36,4 @@
#define MP_MPU_REGION_MRAM (3)
#define MP_MPU_REGION_OSPI_REGISTERS (4)
#define MP_MPU_REGION_OSPI0_XIP (5)
#define MP_MPU_REGION_OPENAMP (6)