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stm32/boards/ARDUINO_PORTENTA_H7: Enable 4MiB ROMFS part in ext flash.

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Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader
2025-01-14 11:36:22 +01:00
committed by Damien George
parent edc927a185
commit 96ce08e498
2 changed files with 12 additions and 3 deletions
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9
ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
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@@ -32,6 +32,11 @@ typedef unsigned int mp_uint_t; // must be pointer size
#define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET (0)
#define MICROPY_HW_TIM_IS_RESERVED(id) (id == 1)
// ROMFS config
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev.spiflash)
#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
// Flash storage config
#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
#define MICROPY_HW_SPIFLASH_SOFT_RESET (1)
@@ -129,8 +134,8 @@ void PORTENTA_board_osc_enable(int enable);
// QSPI flash #1 for storage
#define MICROPY_HW_QSPI_PRESCALER (2) // 100MHz
#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27)
// Reserve 1MiB at the end for compatibility with alternate firmware that places WiFi blob here.
#define MICROPY_HW_SPIFLASH_SIZE_BITS (120 * 1024 * 1024)
// Reserve 4MiB for romfs and 1MiB for WiFi/BT firmware.
#define MICROPY_HW_SPIFLASH_SIZE_BITS (88 * 1024 * 1024)
#define MICROPY_HW_QSPIFLASH_CS (pyb_pin_QSPI2_CS)
#define MICROPY_HW_QSPIFLASH_SCK (pyb_pin_QSPI2_CLK)
#define MICROPY_HW_QSPIFLASH_IO0 (pyb_pin_QSPI2_D0)

6
ports/stm32/boards/ARDUINO_PORTENTA_H7/stm32h747.ld
View File

@@ -13,11 +13,11 @@ MEMORY
SRAM3 (xrw) : ORIGIN = 0x30040000, LENGTH = 32K /* SRAM3 D2 */
SRAM4 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 D3 */
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* Total available flash */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 16384K /* 16MBs external QSPI flash */
FLASH_BL (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* Arduino bootloader */
FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* filesystem */
FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K /* CM7 firmware */
FLASH_CM4 (rx) : ORIGIN = 0x08180000, LENGTH = 512K /* CM4 firmware */
FLASH_ROMFS (rx) : ORIGIN = 0x90B00000, LENGTH = 4096K /* romfs partition in QSPI flash */
}
/* produce a link error if there is not this amount of RAM for these sections */
@@ -44,6 +44,10 @@ _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
/* Location of romfs filesystem */
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
/* OpenAMP shared memory region */
_openamp_shm_region_start = ORIGIN(SRAM4);
_openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);