Matthias Blankertz
0a96ce78f0
- WIP: New cache for CPU - Memory controller now supports modulu bursts and different burst lengths - WIP: Timing problems...
51 lines
1.0 KiB
C
51 lines
1.0 KiB
C
// Copyright (c) 2013 Matthias Blankertz <matthias@blankertz.org>
|
|
|
|
#include <stdbool.h>
|
|
|
|
#include "spi.h"
|
|
|
|
static volatile unsigned char * const spi_data = (unsigned char *)0x08010030;
|
|
static volatile unsigned char * const spi_status = (unsigned char *)0x08010031;
|
|
static volatile unsigned char * const spi_config = (unsigned char *)0x08010032;
|
|
static volatile unsigned char * const spi_ss = (unsigned char *)0x08010033;
|
|
|
|
static bool _spi_rxempty() {
|
|
return ((*spi_status&0x4)==0x4);
|
|
}
|
|
|
|
static bool _spi_txfull() {
|
|
return ((*spi_status&0x2)==0x2);
|
|
}
|
|
|
|
static bool _spi_idle() {
|
|
return ((*spi_status&0x1)==0x1);
|
|
}
|
|
|
|
void spi_write(unsigned char data) {
|
|
while(_spi_txfull()) {}
|
|
*spi_data = data;
|
|
}
|
|
|
|
unsigned char spi_read() {
|
|
while(_spi_rxempty()) {}
|
|
return *spi_data;
|
|
}
|
|
|
|
unsigned char spi_xmit(unsigned char data) {
|
|
spi_write(data);
|
|
return spi_read();
|
|
}
|
|
|
|
void spi_set_ss(bool active) {
|
|
while(!_spi_idle()) {}
|
|
if(active)
|
|
*spi_ss = 0x0;
|
|
else
|
|
*spi_ss = 0x1;
|
|
}
|
|
|
|
void spi_setclk(unsigned char div) {
|
|
while(!_spi_idle()) {}
|
|
*spi_config = div;
|
|
}
|