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2d_display_engine-new/wb_ddr_ctrl_tb.wcfg
Matthias Blankertz 321ea30ed8 - Added synthesis contraints 
- Added ZPU processor
- Optimized wb_ddr_ctrl_wb_dc* to meet timing
- Added cache frontend
2013-03-04 12:55:59 +01:00

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<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="./isim.wdb" id="1" type="auto">
<top_modules>
<top_module name="intercon_package" />
<top_module name="numeric_std" />
<top_module name="std_logic_1164" />
<top_module name="std_logic_arith" />
<top_module name="std_logic_unsigned" />
<top_module name="textio" />
<top_module name="vcomponents" />
<top_module name="vhdl_bl4_parameters_0" />
<top_module name="vital_primitives" />
<top_module name="vital_timing" />
<top_module name="vl_types" />
<top_module name="vpkg" />
<top_module name="wb_ddr_ctrl_tb" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="3" />
<wvobject fp_name="group31" type="group">
<obj_property name="label">toplevel</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_clock" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clock</obj_property>
<obj_property name="ObjectShortName">ddr2_clock</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_reset</obj_property>
<obj_property name="ObjectShortName">ddr2_reset</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_dq" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dq[15:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dq[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_a" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_a[12:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_a[12:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_ba" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ba[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ba[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_cke" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cke</obj_property>
<obj_property name="ObjectShortName">ddr2_cke</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_cs_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cs_n</obj_property>
<obj_property name="ObjectShortName">ddr2_cs_n</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_ras_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ras_n</obj_property>
<obj_property name="ObjectShortName">ddr2_ras_n</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_cas_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cas_n</obj_property>
<obj_property name="ObjectShortName">ddr2_cas_n</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_we_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_we_n</obj_property>
<obj_property name="ObjectShortName">ddr2_we_n</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_odt" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_odt</obj_property>
<obj_property name="ObjectShortName">ddr2_odt</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_dm" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dm[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dm[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/rst_dqs_div_in" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_dqs_div_in</obj_property>
<obj_property name="ObjectShortName">rst_dqs_div_in</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/rst_dqs_div_out" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_dqs_div_out</obj_property>
<obj_property name="ObjectShortName">rst_dqs_div_out</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_dqs" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dqs[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dqs[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_dqs_n" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dqs_n[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dqs_n[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_ck" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ck[0:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ck[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ddr2_ck_n" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ck_n[0:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ck_n[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dat_i[31:0]</obj_property>
<obj_property name="ObjectShortName">dat_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dat_o[31:0]</obj_property>
<obj_property name="ObjectShortName">dat_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/ack_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ack_o</obj_property>
<obj_property name="ObjectShortName">ack_o</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/adr_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_i[25:2]</obj_property>
<obj_property name="ObjectShortName">adr_i[25:2]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/cyc_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cyc_i</obj_property>
<obj_property name="ObjectShortName">cyc_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/sel_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sel_i[3:0]</obj_property>
<obj_property name="ObjectShortName">sel_i[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/stb_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">stb_i</obj_property>
<obj_property name="ObjectShortName">stb_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/we_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">we_i</obj_property>
<obj_property name="ObjectShortName">we_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/cti_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cti_i[2:0]</obj_property>
<obj_property name="ObjectShortName">cti_i[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/bte_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">bte_i[1:0]</obj_property>
<obj_property name="ObjectShortName">bte_i[1:0]</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group32" type="group">
<obj_property name="label">ddr_cd_inst</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr2_clk0" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk0</obj_property>
<obj_property name="ObjectShortName">ddr2_clk0</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr2_clk180" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk180</obj_property>
<obj_property name="ObjectShortName">ddr2_clk180</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr2_clk90" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk90</obj_property>
<obj_property name="ObjectShortName">ddr2_clk90</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr2_reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_reset</obj_property>
<obj_property name="ObjectShortName">ddr2_reset</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_input_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_input_data[31:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_input_data[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_data_mask" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_data_mask[3:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_data_mask[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_output_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_output_data[31:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_output_data[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_data_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_data_valid</obj_property>
<obj_property name="ObjectShortName">ctrl_data_valid</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_input_address" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_input_address[24:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_input_address[24:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_command_register" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_command_register[2:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_command_register[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_burst_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_burst_done</obj_property>
<obj_property name="ObjectShortName">ctrl_burst_done</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_auto_ref_req" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_auto_ref_req</obj_property>
<obj_property name="ObjectShortName">ctrl_auto_ref_req</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_cmd_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_cmd_ack</obj_property>
<obj_property name="ObjectShortName">ctrl_cmd_ack</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_init_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_init_done</obj_property>
<obj_property name="ObjectShortName">ctrl_init_done</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_ar_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_ar_done</obj_property>
<obj_property name="ObjectShortName">ctrl_ar_done</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/din" type="array" db_ref_id="1">
<obj_property name="ElementShortName">din[63:0]</obj_property>
<obj_property name="ObjectShortName">din[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dout[63:0]</obj_property>
<obj_property name="ObjectShortName">dout[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr[22:0]</obj_property>
<obj_property name="ObjectShortName">adr[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/we" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">we</obj_property>
<obj_property name="ObjectShortName">we</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/be" type="array" db_ref_id="1">
<obj_property name="ElementShortName">be[7:0]</obj_property>
<obj_property name="ObjectShortName">be[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/fifo_to_sys_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_sys_write</obj_property>
<obj_property name="ObjectShortName">fifo_to_sys_write</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/fifo_from_sys_read" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_read</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_read</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/fifo_to_sys_full" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_sys_full</obj_property>
<obj_property name="ObjectShortName">fifo_to_sys_full</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/fifo_from_sys_empty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_empty</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_empty</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_address" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_address[22:0]</obj_property>
<obj_property name="ObjectShortName">ddr_address[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_address_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_address_en</obj_property>
<obj_property name="ObjectShortName">ddr_address_en</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout[31:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dout[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dout_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout_en</obj_property>
<obj_property name="ObjectShortName">ddr_dout_en</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dout_high" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout_high</obj_property>
<obj_property name="ObjectShortName">ddr_dout_high</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/dout_low" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dout_low[31:0]</obj_property>
<obj_property name="ObjectShortName">dout_low[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/dout_low_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dout_low_en</obj_property>
<obj_property name="ObjectShortName">dout_low_en</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dmask" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask[3:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dmask[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dmask_rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask_rst</obj_property>
<obj_property name="ObjectShortName">ddr_dmask_rst</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ddr_dmask_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask_en</obj_property>
<obj_property name="ObjectShortName">ddr_dmask_en</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_command_register_d" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_command_register_d[2:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_command_register_d[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/ctrl_burst_done_d" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_burst_done_d</obj_property>
<obj_property name="ObjectShortName">ctrl_burst_done_d</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/ctrl_state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_state</obj_property>
<obj_property name="ObjectShortName">ctrl_state</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/burst_start_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">burst_start_adr[12:0]</obj_property>
<obj_property name="ObjectShortName">burst_start_adr[12:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_pending" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_pending</obj_property>
<obj_property name="ObjectShortName">fifo_pending</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_from_sys_read_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_read_int</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_read_int</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_from_sys_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_valid</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_valid</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group33" type="group">
<obj_property name="label">system_cd_inst</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/wbs_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_i</obj_property>
<obj_property name="ObjectShortName">wbs_i</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/wbs_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_o</obj_property>
<obj_property name="ObjectShortName">wbs_o</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_din" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_din[63:0]</obj_property>
<obj_property name="ObjectShortName">ddr_din[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout[63:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dout[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_adr[22:0]</obj_property>
<obj_property name="ObjectShortName">ddr_adr[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_we" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_we</obj_property>
<obj_property name="ObjectShortName">ddr_we</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_be" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_be[7:0]</obj_property>
<obj_property name="ObjectShortName">ddr_be[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_to_ddr_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_write</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_write</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_from_ddr_read" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_read</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_read</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_to_ddr_full" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_full</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_full</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_from_ddr_empty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_empty</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_empty</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">state</obj_property>
<obj_property name="ObjectShortName">state</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_from_ddr_read_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_read_int</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_read_int</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/fifo_from_ddr_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_valid</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_valid</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/ddr_dout_high" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout_high</obj_property>
<obj_property name="ObjectShortName">ddr_dout_high</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/burst_unaligned" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">burst_unaligned</obj_property>
<obj_property name="ObjectShortName">burst_unaligned</obj_property>
</wvobject>
<wvobject fp_name="/wb_ddr_ctrl_tb/DUT/wb_0/system_cd_inst/burst_ctr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">burst_ctr</obj_property>
<obj_property name="ObjectShortName">burst_ctr</obj_property>
</wvobject>
</wvobject>
</wave_config>
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