Matthias Blankertz
0a96ce78f0
- WIP: New cache for CPU - Memory controller now supports modulu bursts and different burst lengths - WIP: Timing problems...
66 lines
3.6 KiB
Plaintext
Executable File
66 lines
3.6 KiB
Plaintext
Executable File
# Timing constraints
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NET "CLKIN_50MHZ" TNM_NET = "CLK_50";
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TIMESPEC "TS_CLK_50" = PERIOD "CLK_50" 20.0 ns HIGH 50 %;
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# NET "CLKIN_133MHZ" PERIOD = 7.51ns HIGH 40%;
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TIMEGRP "vga" OFFSET = OUT 10ns AFTER "CLKIN_50MHZ" RISING;
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TIMEGRP "cpu_wbm_adr_o"=FFS("cpu_inst/mblite_wbm_inst/wbm_o.adr_o_*");
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NET "uart_inst/ACK_O" TPTHRU = "uart_ack_o" ;
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TIMEGRP "allff" = FFS("*");
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TIMESPEC TSfalsewb1 = FROM "cpu_wbm_adr_o" THRU "uart_ack_o" TO FFS("*") TS_CLK_50*2;
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# Location and I/O defs
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# Clocks
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NET "CLKIN_50MHZ" LOC = "E12"| IOSTANDARD = LVCMOS33 ;
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NET "CLKIN_133MHZ" LOC = "V12"| IOSTANDARD = LVCMOS33 ;
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# Reset (on BTN_EAST)
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NET "RESET" LOC = "T16" | IOSTANDARD = LVCMOS33 | PULLDOWN ;
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# VGA output
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NET "VGA_R<3>" LOC = "C8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_R<2>" LOC = "B8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_R<1>" LOC = "B3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_R<0>" LOC = "A3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_G<3>" LOC = "D6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_G<2>" LOC = "C6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_G<1>" LOC = "D5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_G<0>" LOC = "C5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_B<3>" LOC = "C9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_B<2>" LOC = "B9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_B<1>" LOC = "D7" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_B<0>" LOC = "C7" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_HSYNC" LOC = "C11" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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NET "VGA_VSYNC" LOC = "B11" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST | TNM_NET = "VGA" ;
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# SPI flash
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NET "DATAFLASH_MISO" LOC = "AB20" | IOSTANDARD = LVCMOS33 ;
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NET "DATAFLASH_MOSI" LOC = "AB14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
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NET "DATAFLASH_SCK" LOC = "AA20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
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NET "DATAFLASH_SS" LOC = "Y4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
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# write-protect and reset controls for Atmel AT45DB161D PROM
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NET "DATAFLASH_WP" LOC = "C14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
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NET "DATAFLASH_RST" LOC = "C15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
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# LEDs
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NET "LED<0>" LOC = "R20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<1>" LOC = "T19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<2>" LOC = "U20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<3>" LOC = "U19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<4>" LOC = "V19" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<5>" LOC = "V20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<6>" LOC = "Y22" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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NET "LED<7>" LOC = "W21" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
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# RS232
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NET "RS232_RXD" LOC = "E16" | IOSTANDARD = LVCMOS33;
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NET "RS232_TXD" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
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# MicroSD PMOD (in J18)
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NET "SD_MISO" LOC = "AA21" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | PULLUP;
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NET "SD_SCK" LOC = "AB21" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
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NET "SD_CS" LOC = "AA19" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
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NET "SD_MOSI" LOC = "AB19" | IOSTANDARD = LVCMOS33 | DRIVE = 8;
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