matthias/2d_display_engine-new
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2d_display_engine-new/toplevel_tb.wcfg
Matthias Blankertz a6b20d3311 - Fixed wishbone interconnect generator 
- Fixed accidental latches in wb_ddr_ctrl_wb_sc.vhd
- Updated cpu for new manual cache flush
2013-03-21 16:06:53 +01:00

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<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="./isim.wdb" id="1" type="auto">
<top_modules>
<top_module name="intercon_package" />
<top_module name="numeric_std" />
<top_module name="sim_bmppack" />
<top_module name="std_logic_1164" />
<top_module name="std_logic_arith" />
<top_module name="std_logic_unsigned" />
<top_module name="textio" />
<top_module name="toplevel_tb" />
<top_module name="vcomponents" />
<top_module name="vhdl_bl4_parameters_0" />
<top_module name="vital_primitives" />
<top_module name="vital_timing" />
<top_module name="vl_types" />
<top_module name="vpkg" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="44" />
<wvobject fp_name="/toplevel_tb/DUT/clkin_50mhz" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clkin_50mhz</obj_property>
<obj_property name="ObjectShortName">clkin_50mhz</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/clkin_133mhz" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clkin_133mhz</obj_property>
<obj_property name="ObjectShortName">clkin_133mhz</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_r" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_r[3:0]</obj_property>
<obj_property name="ObjectShortName">vga_r[3:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_g" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_g[3:0]</obj_property>
<obj_property name="ObjectShortName">vga_g[3:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_b" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_b[3:0]</obj_property>
<obj_property name="ObjectShortName">vga_b[3:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_vsync" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_vsync</obj_property>
<obj_property name="ObjectShortName">vga_vsync</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_hsync" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_hsync</obj_property>
<obj_property name="ObjectShortName">vga_hsync</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_mosi" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_mosi</obj_property>
<obj_property name="ObjectShortName">dataflash_mosi</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_sck" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_sck</obj_property>
<obj_property name="ObjectShortName">dataflash_sck</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_ss" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_ss</obj_property>
<obj_property name="ObjectShortName">dataflash_ss</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_wp" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_wp</obj_property>
<obj_property name="ObjectShortName">dataflash_wp</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_rst</obj_property>
<obj_property name="ObjectShortName">dataflash_rst</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/dataflash_miso" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dataflash_miso</obj_property>
<obj_property name="ObjectShortName">dataflash_miso</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_dq" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dq[15:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dq[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_a" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_a[12:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_a[12:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_ba" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ba[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ba[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_cke" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cke</obj_property>
<obj_property name="ObjectShortName">ddr2_cke</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_cs_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cs_n</obj_property>
<obj_property name="ObjectShortName">ddr2_cs_n</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_ras_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ras_n</obj_property>
<obj_property name="ObjectShortName">ddr2_ras_n</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_cas_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_cas_n</obj_property>
<obj_property name="ObjectShortName">ddr2_cas_n</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_we_n" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_we_n</obj_property>
<obj_property name="ObjectShortName">ddr2_we_n</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_odt" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_odt</obj_property>
<obj_property name="ObjectShortName">ddr2_odt</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_dm" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dm[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dm[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/rst_dqs_div_in" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_dqs_div_in</obj_property>
<obj_property name="ObjectShortName">rst_dqs_div_in</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/rst_dqs_div_out" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_dqs_div_out</obj_property>
<obj_property name="ObjectShortName">rst_dqs_div_out</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_dqs" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dqs[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dqs[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_dqs_n" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_dqs_n[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_dqs_n[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_ck" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ck[0:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ck[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr2_ck_n" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_ck_n[0:0]</obj_property>
<obj_property name="ObjectShortName">ddr2_ck_n[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sysclk" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">sysclk</obj_property>
<obj_property name="ObjectShortName">sysclk</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sysrst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">sysrst</obj_property>
<obj_property name="ObjectShortName">sysrst</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_mem_rdrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_rdrq</obj_property>
<obj_property name="ObjectShortName">vga_mem_rdrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_mem_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_adr[19:0]</obj_property>
<obj_property name="ObjectShortName">vga_mem_adr[19:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_mem_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_ack</obj_property>
<obj_property name="ObjectShortName">vga_mem_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_mem_dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_dat_i[63:0]</obj_property>
<obj_property name="ObjectShortName">vga_mem_dat_i[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cpu_wbm_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.dat_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.dat_o</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.we_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.we_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.we_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.sel_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.sel_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.sel_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.adr_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.adr_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.adr_o</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.cyc_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.cyc_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.cyc_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_wbm_o.stb_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.stb_o</obj_property>
<obj_property name="ObjectShortName">cpu_wbm_o.stb_o</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sdram_ctrl_wbs_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.dat_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.dat_i</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.we_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.we_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.we_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.sel_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.sel_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.sel_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.adr_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.adr_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.adr_i</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.cyc_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.cyc_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.cyc_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_i.stb_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.stb_i</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_i.stb_i</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sdram_ctrl_wbs_o</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_o</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_o.dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.dat_o</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_o.dat_o</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/sdram_ctrl_wbs_o.ack_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.ack_o</obj_property>
<obj_property name="ObjectShortName">sdram_ctrl_wbs_o.ack_o</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group68" type="group">
<obj_property name="label">cpu_1</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbm_i</obj_property>
<obj_property name="ObjectShortName">wbm_i</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_i.dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.dat_i</obj_property>
<obj_property name="ObjectShortName">wbm_i.dat_i</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_i.ack_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.ack_i</obj_property>
<obj_property name="ObjectShortName">wbm_i.ack_i</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbm_o</obj_property>
<obj_property name="ObjectShortName">wbm_o</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.dat_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.dat_o</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.we_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.we_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.we_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.sel_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.sel_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.sel_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.adr_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">.adr_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.adr_o</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.cyc_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.cyc_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.cyc_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/wbm_o.stb_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">.stb_o</obj_property>
<obj_property name="ObjectShortName">wbm_o.stb_o</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">state</obj_property>
<obj_property name="ObjectShortName">state</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/x" type="other" db_ref_id="1">
<obj_property name="ElementShortName">x</obj_property>
<obj_property name="ObjectShortName">x</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/y" type="other" db_ref_id="1">
<obj_property name="ElementShortName">y</obj_property>
<obj_property name="ObjectShortName">y</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/cpu_system_inst/adr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">adr</obj_property>
<obj_property name="ObjectShortName">adr</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group86" type="group">
<obj_property name="label">vga_pixelgen_1</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/clk" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst</obj_property>
<obj_property name="ObjectShortName">rst</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/pixeldata" type="array" db_ref_id="1">
<obj_property name="ElementShortName">pixeldata[63:0]</obj_property>
<obj_property name="ObjectShortName">pixeldata[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/fifo_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_write</obj_property>
<obj_property name="ObjectShortName">fifo_write</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/fifo_full16" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_full16</obj_property>
<obj_property name="ObjectShortName">fifo_full16</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/fifo_rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_rst</obj_property>
<obj_property name="ObjectShortName">fifo_rst</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/vsync" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vsync</obj_property>
<obj_property name="ObjectShortName">vsync</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/mem_rdrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_rdrq</obj_property>
<obj_property name="ObjectShortName">mem_rdrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/mem_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_adr[19:0]</obj_property>
<obj_property name="ObjectShortName">mem_adr[19:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/mem_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_ack</obj_property>
<obj_property name="ObjectShortName">mem_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/mem_dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_dat_i[63:0]</obj_property>
<obj_property name="ObjectShortName">mem_dat_i[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">state</obj_property>
<obj_property name="ObjectShortName">state</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/addr_ctr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">addr_ctr</obj_property>
<obj_property name="ObjectShortName">addr_ctr</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/vga_1/vga_pixelreader_inst/burst_ctr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">burst_ctr</obj_property>
<obj_property name="ObjectShortName">burst_ctr</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group156" type="group">
<obj_property name="label">ddr_ctrl_sc</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wbs_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_i</obj_property>
<obj_property name="ObjectShortName">wbs_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wbs_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_o</obj_property>
<obj_property name="ObjectShortName">wbs_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wbs_cc_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_cc_i</obj_property>
<obj_property name="ObjectShortName">wbs_cc_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wbs_cc_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_cc_o</obj_property>
<obj_property name="ObjectShortName">wbs_cc_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_mem_rdrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_rdrq</obj_property>
<obj_property name="ObjectShortName">vga_mem_rdrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_mem_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_adr[19:0]</obj_property>
<obj_property name="ObjectShortName">vga_mem_adr[19:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_mem_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_ack</obj_property>
<obj_property name="ObjectShortName">vga_mem_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_mem_dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_mem_dat_i[63:0]</obj_property>
<obj_property name="ObjectShortName">vga_mem_dat_i[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_din" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_din[63:0]</obj_property>
<obj_property name="ObjectShortName">ddr_din[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout[63:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dout[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_adr[22:0]</obj_property>
<obj_property name="ObjectShortName">ddr_adr[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_we" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_we</obj_property>
<obj_property name="ObjectShortName">ddr_we</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_be" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_be[7:0]</obj_property>
<obj_property name="ObjectShortName">ddr_be[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_to_ddr_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_write</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_write</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_from_ddr_read" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_read</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_read</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_to_ddr_full" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_full</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_full</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_from_ddr_empty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_ddr_empty</obj_property>
<obj_property name="ObjectShortName">fifo_from_ddr_empty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_adr[19:0]</obj_property>
<obj_property name="ObjectShortName">cfe_mem_adr[19:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_rdrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_rdrq</obj_property>
<obj_property name="ObjectShortName">cfe_mem_rdrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_wrrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_wrrq</obj_property>
<obj_property name="ObjectShortName">cfe_mem_wrrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_dat_o[63:0]</obj_property>
<obj_property name="ObjectShortName">cfe_mem_dat_o[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_ack</obj_property>
<obj_property name="ObjectShortName">cfe_mem_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_mem_dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cfe_mem_dat_i[63:0]</obj_property>
<obj_property name="ObjectShortName">cfe_mem_dat_i[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_rdrq_reg" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_rdrq_reg</obj_property>
<obj_property name="ObjectShortName">vga_rdrq_reg</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_adr_reg" type="array" db_ref_id="1">
<obj_property name="ElementShortName">vga_adr_reg[19:0]</obj_property>
<obj_property name="ObjectShortName">vga_adr_reg[19:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/vga_rq_complete" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">vga_rq_complete</obj_property>
<obj_property name="ObjectShortName">vga_rq_complete</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_rdrq_reg" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_rdrq_reg</obj_property>
<obj_property name="ObjectShortName">cfe_rdrq_reg</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_wrrq_reg" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_wrrq_reg</obj_property>
<obj_property name="ObjectShortName">cfe_wrrq_reg</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_adr_reg" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cfe_adr_reg[19:0]</obj_property>
<obj_property name="ObjectShortName">cfe_adr_reg[19:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/cfe_rq_complete" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cfe_rq_complete</obj_property>
<obj_property name="ObjectShortName">cfe_rq_complete</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/dout_data_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dout_data_valid</obj_property>
<obj_property name="ObjectShortName">dout_data_valid</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/bus_owner" type="other" db_ref_id="1">
<obj_property name="ElementShortName">bus_owner</obj_property>
<obj_property name="ObjectShortName">bus_owner</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/bus_owner_reg" type="other" db_ref_id="1">
<obj_property name="ElementShortName">bus_owner_reg</obj_property>
<obj_property name="ObjectShortName">bus_owner_reg</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/out_ctr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">out_ctr</obj_property>
<obj_property name="ObjectShortName">out_ctr</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/in_ctr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">in_ctr</obj_property>
<obj_property name="ObjectShortName">in_ctr</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/out_complete" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">out_complete</obj_property>
<obj_property name="ObjectShortName">out_complete</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/in_complete" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">in_complete</obj_property>
<obj_property name="ObjectShortName">in_complete</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/in_read" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">in_read</obj_property>
<obj_property name="ObjectShortName">in_read</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/in_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">in_write</obj_property>
<obj_property name="ObjectShortName">in_write</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_adr_int" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_adr_int[22:0]</obj_property>
<obj_property name="ObjectShortName">ddr_adr_int[22:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_adr_dly" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_adr_dly[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr_adr_dly[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_we_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_we_int</obj_property>
<obj_property name="ObjectShortName">ddr_we_int</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/ddr_we_dly" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_we_dly[1:0]</obj_property>
<obj_property name="ObjectShortName">ddr_we_dly[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_to_ddr_write_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_write_int</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_write_int</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_to_ddr_write_dly" type="array" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_write_dly[1:0]</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_write_dly[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/out_complete_dly" type="array" db_ref_id="1">
<obj_property name="ElementShortName">out_complete_dly[1:0]</obj_property>
<obj_property name="ObjectShortName">out_complete_dly[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/fifo_to_ddr_full_last" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_ddr_full_last</obj_property>
<obj_property name="ObjectShortName">fifo_to_ddr_full_last</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group214" type="group">
<obj_property name="label">cfe</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/wbs_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_i</obj_property>
<obj_property name="ObjectShortName">wbs_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/wbs_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_o</obj_property>
<obj_property name="ObjectShortName">wbs_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/wbs_cc_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_cc_i</obj_property>
<obj_property name="ObjectShortName">wbs_cc_i</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/wbs_cc_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wbs_cc_o</obj_property>
<obj_property name="ObjectShortName">wbs_cc_o</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_adr[19:0]</obj_property>
<obj_property name="ObjectShortName">mem_adr[19:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_rdrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_rdrq</obj_property>
<obj_property name="ObjectShortName">mem_rdrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_wrrq" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_wrrq</obj_property>
<obj_property name="ObjectShortName">mem_wrrq</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_dat_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_dat_o[63:0]</obj_property>
<obj_property name="ObjectShortName">mem_dat_o[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_ack</obj_property>
<obj_property name="ObjectShortName">mem_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_dat_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_dat_i[63:0]</obj_property>
<obj_property name="ObjectShortName">mem_dat_i[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_tag" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_tag[31:0]</obj_property>
<obj_property name="ObjectShortName">cc_tag[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_lru" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_lru[31:0]</obj_property>
<obj_property name="ObjectShortName">cc_lru[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_valid" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_valid[31:0]</obj_property>
<obj_property name="ObjectShortName">cc_valid[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_dirty" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_dirty[31:0]</obj_property>
<obj_property name="ObjectShortName">cc_dirty[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_we" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cc_we</obj_property>
<obj_property name="ObjectShortName">cc_we</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_wr_addr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_wr_addr[4:0]</obj_property>
<obj_property name="ObjectShortName">cc_wr_addr[4:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_rd_addr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_rd_addr[4:0]</obj_property>
<obj_property name="ObjectShortName">cc_rd_addr[4:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_tag_wr_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_tag_wr_data[29:0]</obj_property>
<obj_property name="ObjectShortName">cc_tag_wr_data[29:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_tag_rd_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_tag_rd_data[29:0]</obj_property>
<obj_property name="ObjectShortName">cc_tag_rd_data[29:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_lru_wr_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_lru_wr_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_lru_wr_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_lru_rd_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_lru_rd_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_lru_rd_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_valid_wr_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_valid_wr_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_valid_wr_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_valid_rd_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_valid_rd_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_valid_rd_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_dirty_wr_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_dirty_wr_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_dirty_wr_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cc_dirty_rd_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cc_dirty_rd_data[1:0]</obj_property>
<obj_property name="ObjectShortName">cc_dirty_rd_data[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/tags" type="array" db_ref_id="1">
<obj_property name="ElementShortName">tags[1:0]</obj_property>
<obj_property name="ObjectShortName">tags[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_wr_addr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cache_wr_addr[8:0]</obj_property>
<obj_property name="ObjectShortName">cache_wr_addr[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_rd_addr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cache_rd_addr[8:0]</obj_property>
<obj_property name="ObjectShortName">cache_rd_addr[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_wr_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cache_wr_data[63:0]</obj_property>
<obj_property name="ObjectShortName">cache_wr_data[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_rd_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cache_rd_data[63:0]</obj_property>
<obj_property name="ObjectShortName">cache_rd_data[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_bwe" type="array" db_ref_id="1">
<obj_property name="ElementShortName">cache_bwe[7:0]</obj_property>
<obj_property name="ObjectShortName">cache_bwe[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_index" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_index[4:0]</obj_property>
<obj_property name="ObjectShortName">adr_index[4:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_offset" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_offset[2:0]</obj_property>
<obj_property name="ObjectShortName">adr_offset[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_tag" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_tag[14:0]</obj_property>
<obj_property name="ObjectShortName">adr_tag[14:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_tag_eq" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_tag_eq[1:0]</obj_property>
<obj_property name="ObjectShortName">adr_tag_eq[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/lru_eq0" type="array" db_ref_id="1">
<obj_property name="ElementShortName">lru_eq0[1:0]</obj_property>
<obj_property name="ObjectShortName">lru_eq0[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_tag_eq_num" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr_tag_eq_num[0:0]</obj_property>
<obj_property name="ObjectShortName">adr_tag_eq_num[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/eject_num" type="array" db_ref_id="1">
<obj_property name="ElementShortName">eject_num[0:0]</obj_property>
<obj_property name="ObjectShortName">eject_num[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/update_lru" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">update_lru</obj_property>
<obj_property name="ObjectShortName">update_lru</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/set_dirty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">set_dirty</obj_property>
<obj_property name="ObjectShortName">set_dirty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/set_clean" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">set_clean</obj_property>
<obj_property name="ObjectShortName">set_clean</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/set_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">set_valid</obj_property>
<obj_property name="ObjectShortName">set_valid</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cache_write</obj_property>
<obj_property name="ObjectShortName">cache_write</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_from_mem" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cache_from_mem</obj_property>
<obj_property name="ObjectShortName">cache_from_mem</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/eject_dirty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">eject_dirty</obj_property>
<obj_property name="ObjectShortName">eject_dirty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/set_invalid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">set_invalid</obj_property>
<obj_property name="ObjectShortName">set_invalid</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/cache_to_mem" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">cache_to_mem</obj_property>
<obj_property name="ObjectShortName">cache_to_mem</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/adr_tag_eq_num_dirty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">adr_tag_eq_num_dirty</obj_property>
<obj_property name="ObjectShortName">adr_tag_eq_num_dirty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_offset" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_offset[2:0]</obj_property>
<obj_property name="ObjectShortName">mem_offset[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_offset_dly" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mem_offset_dly[2:0]</obj_property>
<obj_property name="ObjectShortName">mem_offset_dly[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_rdrq_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_rdrq_int</obj_property>
<obj_property name="ObjectShortName">mem_rdrq_int</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mem_wrrq_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_wrrq_int</obj_property>
<obj_property name="ObjectShortName">mem_wrrq_int</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mfi</obj_property>
<obj_property name="ObjectShortName">mfi</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi_index" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mfi_index[4:0]</obj_property>
<obj_property name="ObjectShortName">mfi_index[4:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi_num" type="array" db_ref_id="1">
<obj_property name="ElementShortName">mfi_num[0:0]</obj_property>
<obj_property name="ObjectShortName">mfi_num[0:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi_index_ctr_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mfi_index_ctr_en</obj_property>
<obj_property name="ObjectShortName">mfi_index_ctr_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi_num_ctr_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mfi_num_ctr_en</obj_property>
<obj_property name="ObjectShortName">mfi_num_ctr_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/mfi_num_dirty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mfi_num_dirty</obj_property>
<obj_property name="ObjectShortName">mfi_num_dirty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/user_cc_req_flush" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">user_cc_req_flush</obj_property>
<obj_property name="ObjectShortName">user_cc_req_flush</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/user_cc_req_inval" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">user_cc_req_inval</obj_property>
<obj_property name="ObjectShortName">user_cc_req_inval</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/user_cc_req_none" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">user_cc_req_none</obj_property>
<obj_property name="ObjectShortName">user_cc_req_none</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/system_cd_inst/wb_ddr_ctrl_wb_sc_fe_1/wb_ddr_ctrl_wb_sc_fe_fsm_inst/state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">state</obj_property>
<obj_property name="ObjectShortName">state</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group221" type="group">
<obj_property name="label">ddr_ctrl_dc</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr2_clk0" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk0</obj_property>
<obj_property name="ObjectShortName">ddr2_clk0</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr2_clk180" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk180</obj_property>
<obj_property name="ObjectShortName">ddr2_clk180</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr2_clk90" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_clk90</obj_property>
<obj_property name="ObjectShortName">ddr2_clk90</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr2_reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr2_reset</obj_property>
<obj_property name="ObjectShortName">ddr2_reset</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_input_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_input_data[31:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_input_data[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_data_mask" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_data_mask[3:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_data_mask[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_output_data" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_output_data[31:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_output_data[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_data_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_data_valid</obj_property>
<obj_property name="ObjectShortName">ctrl_data_valid</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_input_address" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_input_address[24:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_input_address[24:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_command_register" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_command_register[2:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_command_register[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_burst_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_burst_done</obj_property>
<obj_property name="ObjectShortName">ctrl_burst_done</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_auto_ref_req" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_auto_ref_req</obj_property>
<obj_property name="ObjectShortName">ctrl_auto_ref_req</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_cmd_ack" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_cmd_ack</obj_property>
<obj_property name="ObjectShortName">ctrl_cmd_ack</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_init_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_init_done</obj_property>
<obj_property name="ObjectShortName">ctrl_init_done</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_ar_done" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_ar_done</obj_property>
<obj_property name="ObjectShortName">ctrl_ar_done</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/din" type="array" db_ref_id="1">
<obj_property name="ElementShortName">din[63:0]</obj_property>
<obj_property name="ObjectShortName">din[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dout[63:0]</obj_property>
<obj_property name="ObjectShortName">dout[63:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/adr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">adr[22:0]</obj_property>
<obj_property name="ObjectShortName">adr[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/we" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">we</obj_property>
<obj_property name="ObjectShortName">we</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/be" type="array" db_ref_id="1">
<obj_property name="ElementShortName">be[7:0]</obj_property>
<obj_property name="ObjectShortName">be[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/fifo_to_sys_write" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_sys_write</obj_property>
<obj_property name="ObjectShortName">fifo_to_sys_write</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/fifo_from_sys_read" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_read</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_read</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/fifo_to_sys_full" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_to_sys_full</obj_property>
<obj_property name="ObjectShortName">fifo_to_sys_full</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/fifo_from_sys_empty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_empty</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_empty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/fifo_from_sys_almost_empty" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_almost_empty</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_almost_empty</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_address" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_address[22:0]</obj_property>
<obj_property name="ObjectShortName">ddr_address[22:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_address_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_address_en</obj_property>
<obj_property name="ObjectShortName">ddr_address_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dout" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout[31:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dout[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dout_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout_en</obj_property>
<obj_property name="ObjectShortName">ddr_dout_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dout_high" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dout_high</obj_property>
<obj_property name="ObjectShortName">ddr_dout_high</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dmask" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask[3:0]</obj_property>
<obj_property name="ObjectShortName">ddr_dmask[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dmask_rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask_rst</obj_property>
<obj_property name="ObjectShortName">ddr_dmask_rst</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ddr_dmask_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ddr_dmask_en</obj_property>
<obj_property name="ObjectShortName">ddr_dmask_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_command_register_d" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_command_register_d[2:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_command_register_d[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_burst_done_d" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_burst_done_d</obj_property>
<obj_property name="ObjectShortName">ctrl_burst_done_d</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/dout_low" type="array" db_ref_id="1">
<obj_property name="ElementShortName">dout_low[31:0]</obj_property>
<obj_property name="ObjectShortName">dout_low[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/dout_low_en" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dout_low_en</obj_property>
<obj_property name="ObjectShortName">dout_low_en</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/ctrl_data_valid_toggle" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_data_valid_toggle</obj_property>
<obj_property name="ObjectShortName">ctrl_data_valid_toggle</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/ctrl_state" type="other" db_ref_id="1">
<obj_property name="ElementShortName">ctrl_state</obj_property>
<obj_property name="ObjectShortName">ctrl_state</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_pending" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_pending</obj_property>
<obj_property name="ObjectShortName">fifo_pending</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_from_sys_read_int" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_read_int</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_read_int</obj_property>
</wvobject>
<wvobject fp_name="/toplevel_tb/DUT/ddr_ctrl0/wb_0/ddr_cd_inst/wb_ddr_ctrl_wb_dc_fsm_inst/fifo_from_sys_valid" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">fifo_from_sys_valid</obj_property>
<obj_property name="ObjectShortName">fifo_from_sys_valid</obj_property>
</wvobject>
</wvobject>
</wave_config>
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