14 lines
201 B
Plaintext
14 lines
201 B
Plaintext
From wb to ddr (62 bits)
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data (31..0)
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adr (25..2)
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we
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_burst/single
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be (3..0)
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for read cycles, data is don't care
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From ddr to wb (32 bits)
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data (31..0)
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for write cycles, data is don't care
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