21 lines
525 B
Plaintext
Executable File
21 lines
525 B
Plaintext
Executable File
# Date: Wed Dec 31 13:09:41 2008
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SET addpads = False
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SET asysymbol = False
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SET busformat = BusFormatAngleBracketNotRipped
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SET createndf = False
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SET designentry = VHDL
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SET device = xc3s700an
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SET devicefamily = spartan3a
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SET flowvendor = Other
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SET formalverification = False
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SET foundationsym = False
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SET implementationfiletype = Ngc
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SET package = fgg484
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SET removerpms = False
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SET simulationfiles = Behavioral
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SET speedgrade = -4
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SET verilogsim = False
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SET vhdlsim = True
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SET workingdirectory = c:\vhdl\nascom2\coregen\tmp
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