Matthias Blankertz 90631f89bd - Reworked VGA ...

- Started changing DDR controller interface to 64 bit bus width
- Debugging

2013-03-07 20:55:58 +01:00

..

coregen.cgc

- Begun implementing VGA out

2013-03-02 21:27:54 +01:00

coregen.cgp

- Import project

2013-02-26 23:54:37 +01:00

vga_pixeldata_fifo.xco

- Reworked VGA

2013-03-07 20:55:58 +01:00

wb_ddr_ctrl_wb_from_ddr.xco

- Added synthesis contraints

2013-03-04 12:55:59 +01:00

wb_ddr_ctrl_wb_to_ddr.xco

- Added synthesis contraints

2013-03-04 12:55:59 +01:00