Initial commit
This commit is contained in:
matthias
445
uartprog.psm
Executable file
445
uartprog.psm
Executable file
@@ -0,0 +1,445 @@
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CONSTANT UART_DATA, 00
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CONSTANT UART_CTRL, 01
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CONSTANT LCD_DATA, 05
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CONSTANT LCD_CTRL, 04
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CONSTANT SPI_DATA, 02
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CONSTANT SPI_CTRL, 03
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CONSTANT KEYS, 06
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CONSTANT KEY_CENTER, 10
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CONSTANT KEY_NORTH, 08
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CONSTANT KEY_EAST, 04
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CONSTANT KEY_SOUTH, 02
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CONSTANT KEY_WEST, 01
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NAMEREG sF, PAGE_LSB
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NAMEREG sE, PAGE_MSB
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NAMEREG sD, MODE
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; wait 10 ms (6*256*256)
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LOAD s0, 06
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loop0:
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LOAD s1, FF
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loop1:
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LOAD s2, FF
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loop2:
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SUB s2, 01
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JUMP NZ, loop2
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SUB s1, 01
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JUMP NZ, loop1
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SUB s0, 01
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JUMP NZ, loop0
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LOAD s0, 38
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CALL write_display_i
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CALL wait_busy
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LOAD s0, 0E
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CALL write_display_i
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CALL wait_busy
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LOAD s0, 01
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CALL write_display_i
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CALL wait_busy
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LOAD s0, 06
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CALL write_display_i
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CALL wait_busy
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LOAD s0, 80
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CALL write_display_i
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CALL wait_busy
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; clear page register
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LOAD PAGE_LSB, 00
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LOAD PAGE_MSB, 00
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LOAD s0, PAGE_MSB
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CALL write_hex
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LOAD s0, PAGE_LSB
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CALL write_hex
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; clear mode register
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LOAD MODE, 00
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CALL wait_busy
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LOAD s0, 85
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CALL write_display_i
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LOAD s0, MODE
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CALL write_hex
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main_loop:
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INPUT s0, KEYS
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AND s0, 1D
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JUMP NZ, main_loop
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main_loop_1:
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INPUT s0, KEYS
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TEST s0, KEY_EAST
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JUMP NZ, east
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TEST s0, KEY_WEST
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JUMP NZ, west
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TEST s0, KEY_NORTH
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JUMP NZ, north
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TEST s0, KEY_CENTER
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JUMP NZ, center
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JUMP main_loop_1
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;; increment page
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east:
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ADD PAGE_LSB, 01
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ADDCY PAGE_MSB, 00
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COMPARE PAGE_MSB, 10
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JUMP NZ, east_write
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LOAD PAGE_LSB, 00
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LOAD PAGE_MSB, 00
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east_write:
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CALL wait_busy
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LOAD s0, 80
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CALL write_display_i
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LOAD s0, PAGE_MSB
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CALL write_hex
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LOAD s0, PAGE_LSB
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CALL write_hex
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JUMP main_loop
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;; decrement page
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west:
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SUB PAGE_LSB, 01
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SUBCY PAGE_MSB, 00
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COMPARE PAGE_MSB, FF
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JUMP NZ, west_write
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LOAD PAGE_LSB, FF
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LOAD PAGE_MSB, 0F
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west_write:
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CALL wait_busy
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LOAD s0, 80
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CALL write_display_i
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LOAD s0, PAGE_MSB
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CALL write_hex
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LOAD s0, PAGE_LSB
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CALL write_hex
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JUMP main_loop
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;; toggle mode
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north:
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XOR MODE, 01
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CALL wait_busy
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LOAD s0, 85
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CALL write_display_i
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LOAD s0, MODE
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CALL write_hex
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JUMP main_loop
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;; enter recv/send state
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center:
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TEST MODE, 01
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JUMP Z, send
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CALL recv_page
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JUMP main_loop
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send:
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CALL send_page
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JUMP main_loop
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; receive and write page, s0..s5 overwritten
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recv_page:
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CALL clear_buffer
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LOAD s2, PAGE_MSB
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LOAD s3, PAGE_LSB
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SL0 s3 ; shift top 2 bits to s2
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SLA s2
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SL0 s3
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SLA s2
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CALL spi_busy
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; recv and write data
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LOAD s0, 00
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OUTPUT s0, SPI_CTRL ; Chip select low
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LOAD s0, 82 ; Buffer Write
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CALL do_spi ; write command
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LOAD s0, s2
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CALL do_spi ; write addr
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LOAD s0, s3
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CALL do_spi ; write addr
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LOAD s0, 00
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CALL do_spi ; write addr
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LOAD s4, 00
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LOAD s5, 00
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recv_page_loop:
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ADD s5, 01
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ADDCY s4, 00
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COMPARE s4, 02
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JUMP NZ, recv_page_recv
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COMPARE s5, 11
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JUMP Z, recv_page_exit
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recv_page_recv:
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INPUT s0, KEYS
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AND s0, KEY_CENTER
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JUMP Z, recv_page_end
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INPUT s0, UART_CTRL
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AND s0, 02
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JUMP NZ, recv_page_recv
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INPUT s0, UART_DATA
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CALL do_spi ; write data
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JUMP recv_page_loop
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recv_page_end: ; check if 528 bytes were written
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COMPARE s4, 02
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JUMP NZ, recv_page_wff
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COMPARE s5, 10
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JUMP Z, recv_page_exit
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recv_page_wff: ; write terminating FF if bytes < 528
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LOAD s0, FF
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CALL do_spi
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recv_page_exit:
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LOAD s0, 01
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OUTPUT s0, SPI_CTRL ; Chip select high
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RETURN
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; send page; s0..s5 overwritten
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send_page:
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LOAD s2, PAGE_MSB
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LOAD s3, PAGE_LSB
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SL0 s3 ; shift top 2 bits to s2
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SLA s2
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SL0 s3
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SLA s2
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CALL spi_busy
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LOAD s0, 00
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OUTPUT s0, SPI_CTRL ; Chip select low
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LOAD s0, D2 ; Main Memory Page Read
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CALL do_spi ; write command
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LOAD s0, s2
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CALL do_spi ; write addr
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LOAD s0, s3
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CALL do_spi ; write addr
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LOAD s0, 00
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CALL do_spi ; write addr
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CALL do_spi ; write don't care
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CALL do_spi ; write don't care
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CALL do_spi ; write don't care
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CALL do_spi ; write don't care
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LOAD s4, 00
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LOAD s5, 00
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send_page_loop:
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ADD s5, 01
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ADDCY s4, 00
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COMPARE s4, 02
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JUMP NZ, send_page_send
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COMPARE s5, 11
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JUMP Z, send_page_end
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send_page_send:
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CALL do_spi ; read data
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COMPARE s0, FF
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JUMP Z, send_page_end
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CALL write_data
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; dump incoming data
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send_page_dump:
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INPUT s0, UART_CTRL
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AND s0, 02
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JUMP NZ, send_page_loop
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INPUT s0, UART_DATA
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JUMP send_page_dump
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send_page_end:
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LOAD s0, 01
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OUTPUT s0, SPI_CTRL ; Chip select high
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RETURN
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; data in s0; return in s0;
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do_spi:
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OUTPUT s0, SPI_DATA
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do_spi_wait:
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INPUT s0, SPI_CTRL
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AND s0, 01
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JUMP NZ, do_spi_wait
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INPUT s0, SPI_DATA
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RETURN
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; wait for flash to become unbusy
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spi_busy:
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LOAD s0, 00
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OUTPUT s0, SPI_CTRL ; Chip select low
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LOAD s0, D7
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CALL do_spi
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spi_busy_loop:
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CALL do_spi
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TEST s0, 80
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JUMP Z, spi_busy_loop
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LOAD s0, 01
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OUTPUT s0, SPI_CTRL ; Chip select high
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RETURN
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; clear buffer 1
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clear_buffer:
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CALL spi_busy
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LOAD s0, 00
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OUTPUT s0, SPI_CTRL ; Chip select low
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LOAD s0, 84 ; Buffer Write
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CALL do_spi ; write command
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LOAD s0, 00
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CALL do_spi ; write addr
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LOAD s0, 00
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CALL do_spi ; write addr
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LOAD s0, 00
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CALL do_spi ; write addr
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LOAD s4, 00
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LOAD s5, 00
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clear_buffer_loop:
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ADD s5, 01
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ADDCY s4, 00
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COMPARE s4, 02
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JUMP NZ, clear_buffer_write
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COMPARE s5, 11
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JUMP Z, clear_buffer_end
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clear_buffer_write:
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LOAD s0, FF
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CALL do_spi ; read data
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JUMP clear_buffer_loop
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clear_buffer_end:
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LOAD s0, 01
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OUTPUT s0, SPI_CTRL ; Chip select high
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RETURN
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; data in s0; s1 overwritten
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write_data:
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INPUT s1, UART_CTRL
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AND s1, 01
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JUMP NZ, write_data
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OUTPUT s0, UART_DATA
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RETURN
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; return in s0
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read_data:
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INPUT s0, UART_CTRL
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AND s0, 02
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JUMP NZ, read_data
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INPUT s0, UART_DATA
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RETURN
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; data in s0; s0, s1, s2, s3 overwritten
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write_hex:
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LOAD s3, s0
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LOAD s2, s0
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SR0 s2
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SR0 s2
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SR0 s2
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SR0 s2
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ADD s2, 30
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COMPARE s2, 3A
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JUMP C, write_hex_outh
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ADD s2, 07
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write_hex_outh:
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CALL wait_busy
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LOAD s0, s2
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CALL write_display_d
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LOAD s2, s3
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AND s2, 0F
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ADD s2, 30
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COMPARE s2, 3A
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JUMP C, write_hex_outl
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ADD s2, 07
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write_hex_outl:
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CALL wait_busy
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LOAD s0, s2
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CALL write_display_d
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RETURN
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; data in s0, s0 overwritten
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write_display_i:
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OUTPUT s0, LCD_DATA
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LOAD s0, 00
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LOAD s0, 00
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 01
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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RETURN
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; zero flag reset if busy; s0, s1 overwritten
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busy_display:
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LOAD s0, 04
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 05
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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INPUT s1, LCD_DATA
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LOAD s0, 00
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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AND s1, 80
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RETURN
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wait_busy:
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CALL busy_display
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JUMP NZ, wait_busy
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RETURN
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; data in s0, s0 is overwritten
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write_display_d:
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OUTPUT s0, LCD_DATA
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LOAD s0, 00
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LOAD s0, 02
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 03
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 02
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OUTPUT s0, LCD_CTRL
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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LOAD s0, 00
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RETURN
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