matthias a5dbc23f5e Initial commit

2009-01-15 19:17:56 +00:00

coregen

Initial commit

2009-01-15 19:17:56 +00:00

Basic.coe

Initial commit

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dcm_in50_sim.vhd

Initial commit

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fifo16x8.vhd

Initial commit

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kcpsm3.vhd

Initial commit

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KCPSM3.EXE

Initial commit

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keyboard.vhd

Initial commit

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Makefile

Initial commit

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memory.vhd

Initial commit

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Nasbugt2.coe

Initial commit

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Nasbugt4.coe

Initial commit

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Naschr-1.coe

Initial commit

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nascom2_t80.mpf

Initial commit

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nascom2_vhdl.prj

Initial commit

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nascom2.prj

Initial commit

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nascom2.ucf

Initial commit

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nascom2.xst

Initial commit

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NASSYSI.coe

Initial commit

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ROM_form.coe

Initial commit

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ROM_form.v

Initial commit

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ROM_form.vhd

Initial commit

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spi.vhd

Initial commit

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syncgen.vhd

Initial commit

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T80_ALU.vhd

Initial commit

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T80_MCode.vhd

Initial commit

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T80_Pack.vhd

Initial commit

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T80_Reg.vhd

Initial commit

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T80_RegX.vhd

Initial commit

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T80.vhd

Initial commit

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T80a.vhd

Initial commit

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T80s.vhd

Initial commit

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T80se.vhd

Initial commit

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test.coe

Initial commit

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textgen.vhd

Initial commit

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toplevel_tb.vhd

Initial commit

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toplevel.vhd

Initial commit

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uart_prog.psm

Initial commit

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uart.vhd

Initial commit

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uartprog.psm

Initial commit

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video.vhd

Initial commit

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videogen.vhd

Initial commit

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vsim.wlf

Initial commit

2009-01-15 19:17:56 +00:00

Description

No description provided

1.7 MiB

Languages

VHDL 88.5%

Verilog 6.5%

Tcl 4.6%

Makefile 0.4%